1. Field of the Invention
The present invention relates to a photoelectric conversion apparatus and driving method thereof and, more particularly, to a photoelectric conversion apparatus and driving method thereof capable of outputting signals at higher S/N ratios.
2. Related Background Art
FIG. 1 is a schematic circuit diagram to show the schematic configuration of a photoelectric conversion apparatus. In FIG. 1, S1 indicates a photoelectric conversion element which is comprised of a photodiode P1 and a capacitor C1 herein. Numeral 1 designates a power supply, connected to the photoelectric conversion element, for applying a bias to the photodiode. T1 represents a thin-film transistor (hereinafter referred to as TFT) for transmitting a charge generated according to a quantity of incident light at the photoelectric conversion element S1 to a reading circuit 2. The reading circuit 2 is composed of a capacitor C2, an amplifier A1, and a capacitor resetting switch SW1. Further, numeral 3 denotes a gate driving circuit for applying a voltage (gate pulse Vg) to the gate electrode of TFT T1. In general, the photoelectric conversion element S1 and TFT T1 are obtained by simultaneously forming a semiconductor of each portion using a thin-film semiconductor of amorphous silicon or the like.
FIGS. 2A, 2B, 2C and 2D are timing charts to show the reading timing of the above photoelectric conversion apparatus. As shown in FIG. 2A, light is pulsed light radiated for the time of T(light). After exposure to light causes the charge due to the light to accumulate in the photoelectric conversion element S1, the gate driving circuit 3 applies a gate pulse Vg1 (of pulse width T(Vg)) as shown in FIG. 2B to flip TFT T1 on and then to transfer the charge due to the light to the reading circuit 2. The charge thus transferred is amplified in the reading circuit 2 to be output as an analog image signal Sig (FIG. 2C). After output of the analog image signal, the potential of capacitor C2 in the reading circuit 2 is reset by reset switch SW1 (FIG. 2D).
In the photoelectric conversion apparatus the time T(Vg) to keep the gate of TFT on is set, in general, based on a time constant determined by values of:
(1) capacitance C1 of photoelectric conversion element and capacitance C2 of reading circuit;
(2) on resistance Ron of TFT.
As shown in an example of FIG. 3, the on resistance Ron of TFT of amorphous silicon (reflecting the mobility) is greatly dependent on the temperature and the resistance becomes higher especially at low temperatures (i.e., the mobility decreases).
FIG. 4 shows the relationship between charge transfer efficiency in transferring the charge occurring in the photoelectric conversion element, that is, the charge accumulated in the capacitor C1, to the capacitor C2 of reading circuit, and gate pulse time, and temperature dependence thereof. The gate pulse time necessary for transferring the charge generated in the photoelectric conversion element varies depending upon the temperature. The lower the temperature, the longer the gate pulse time necessary for transfer of charge. In FIG. 4 the gate pulse time necessary for 99% transfer (1% remainder of transfer) at a high temperature is defined as T(Vg)H and the gate pulse time necessary for 99% transfer at a low temperature as T(Vg)L. The gate pulse times at the respective temperatures are in the following relation; EQU T(Vg)L&gt;T(Vg)H.
Accordingly, in the photoelectric conversion apparatus the on time of TFT was set to T(Vg)L so as to achieve sufficient transfer of charge even at low temperatures.
However, the dark current always flows in the photoelectric conversion element. As shown in FIG. 5, the dark current Id of sensor is also dependent on the temperature and the dark current increases with rise of temperature. Namely, there is the following relation: EQU Id(HT)&gt;Id(LT).
During exposure to light and during reading of charge with TFT on after exposure to light, the dark current Id continuously flows in the photoelectric conversion element to affect the reading signal in the form of noise. Therefore, when the on time of TFT is set as long as T(Vg)L in consideration of the transfer of charge at low temperatures as in the above photoelectric conversion apparatus, charges due to the dark current at a high temperature and at a low temperature are in the following relation:
High temperature Low temperature Id(HT) .times. (T(Vg)L + T(Light)) &gt; Id(LT) .times. (T(Vg)L + T(Light));
and thus, the quantity of charge due to the dark current varies against the charge due to exposure to light.
This will appear as reduction of S/N ratio at high temperatures. The reduction of S/N ratio becomes especially outstanding when the exposure-to-light time T(light) and the on time of TFT T(Vg) are in the following relation: EQU T(Vg)&gt;T(Light).
Further, the problem due to the dark current (the reduction of S/N ratio) becomes more outstanding where the apparatus is arranged to comprise a plurality of photoelectric conversion elements and TFTs and to read charges thereof in order using a shift register and the like, as shown in FIG. 6A.
In FIG. 6A, S1 to Sn are photoelectric conversion elements which are comprised of photodiodes P1 to Pn and capacitors C1-1 to C1-n herein. Numeral 1 designates a power supply, connected to the photoelectric conversion elements S1 to Sn, for applying a bias to the photodiodes P1 to Pn. T1 to Tn are TFTs for transferring charges generated according to the quantity of incident light in the photoelectric conversion elements S1 to Sn to the reading circuit 2. In this example the reading circuit 2 is composed of capacitors C2-1 to C2-n, amplifiers A1-1 to A1-n, and capacitor resetting switches SW1-1 to SW1-n. Numeral 4 denotes an analog multiplexer for successively selecting outputs from the reading circuit 2 and outputting them as analog image signals. Further, numeral 5 represents a shift register for applying the gate pulse to TFT T1 to Tn of each pixel.
FIGS. 6B, 6C, 6D, 6E, 6F, 6G and 6H are timing charts to show an example of the reading timing of the photoelectric conversion apparatus of FIG. 6A. As shown in FIG. 6B, the light is pulsed light radiated for the time of T(light). After the exposure to light causes the charge due to light to accumulate in the photoelectric conversion elements, the shift register 5 successively applies the gate pulses Vg1 to VgN as shown in FIGS. 6C, 6D, 6E and 6F to flip TFTs T1 to Tn on in order and then to transfer the charges due to the light to the reading circuit 2. The charges transferred are amplified in the reading circuit 2 and the analog multiplexer 4 successively outputs them as analog image signals Sig (FIG. 6G).
In the configuration to read the signals by using the shift register 5 to successively turn the n TFTs T1 to Tn on as shown in FIG. 6A, the time necessary for reading is T(Vg).times.n and this time increases in proportion to the number of lines to be driven.
In each photoelectric conversion element, not only the charge Qp due to light but also the charge Qd due to the dark current Id are accumulated during reading of charge with TFT on after exposure to light. For example, the following charge due to the dark current accumulates in the photoelectric conversion element Sn of FIG. 6A before application of Vgn to TFT Tn. EQU Qd=(T(light)+(N-1).times.T(Vg)).times.Id.
Accordingly, similarly as described with foregoing FIG. 1, if the on time of TFT is set as long as T(Vg)L in consideration of transfer of charge at low temperatures, quantities of charges Qd due to the dark current at a high temperature and at a low temperature will differ against reading light signals (charges Qp due to light). For example, letting Id(HT) be the dark current at the high temperature and Id(LT) be the dark current at the low temperature, S/N in the photoelectric conversion element Sn at each temperature is given as follows. EQU S/N (high temperature)=(Qp/Qd(HT))=Qp/(T(light)+(N-1).times.T(Vg)L).times.Id(HT) EQU S/N (low temperature)=(Qp/Qd(LT))=Qp/(T(light)+(N-1).times.T(Vg)L).times.Id(LT)
Here, EQU (T(light)+(N-1).times.T(Vg)L).times.Id(HT)&gt;(T(light)+(N-1).times.T(Vg)L).ti mes.Id(LT) EQU Qd(HT)&gt;Qd(LT)
Namely, the component due to the dark current in the charge accumulated in the capacitor C1 is greater at the high temperature than at the low temperature, and the ratio of the component due to the dark current further increases with increase in the line number n. Accordingly, the worst case of S/N will occur with many lines and at high temperatures.
Namely, there was the problem that S/N varied between at high temperatures and at low temperatures and S/N particularly at high temperatures was not sufficient in some cases.
If the transfer time is shortened in order to decrease the component of dark current even a little, it would result in failing to achieve sufficient transfer of signal, of course. In this case there was also the problem that sufficient S/N could not be attained and the dynamic range could be narrowed.